Internet-of-Things (IoT) applications impose a strong, unprecedented demand for high-performance and/or power-efficient digital processing VLSI devices. Research activities carried out at the Laboratory of Digital Systems span all the abstraction levels of the digital VLSI design flow, namely hardware/software platform level, register transfer level (RTL) and circuit level.
Specific fields of competence covered at LSD lab are:
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Advanced embedded HW/SW development:
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Linux, Embedded Linux, kernel programming, driver development
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ARM, PIC, STM32 embedded system SW development
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Zigbee-compatible wireless-sensor-networks
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Architecture modeling/evaluation (single- & multi-core):
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ARM, Leon, ST200, domain-specific (e.g. fuzzy, DSP)
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Modeling languages: QEMU, SystemC, C, VHDL
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RTL semi-custom IP design and IP integration:
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arithmetic units, codecs, JPEG2000 compression, neural architectures
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FPGA and ASIC flow (primarily VHDL based)
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Circuit design:
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CMOS cell design, timing, power, reliability analysis (SPICE level)
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Self-timing, delay insensitive logic, globally-synch-locally-synch.
Research topics include:
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Performance optimization of microprocessor platforms in specific applications;
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Power optimization, low voltage microarchitectures;
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Variability aware circuits and microarchitectures;
Facilities avalaible at LSD lab are the following:
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HW Facilities:
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200MHz Digital Oscilloscope
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100MHZ Logic state analyzer
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PCB development tools
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FPGA Xilinx Spartan6 dev. boards
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FPGA Xilinx Virtex dev. boards
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STM Nucleo (ARM Cortex M3) dev. boards
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Microchip PIC32 and DSPic dev. boards
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Intel Galileo dev. boards
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Raspberry Pi dev. boards
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Atmel AVR (ATmega) dev. board (in house design)
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FPGA Spartan3 dev. board (in house design)
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SW facilities:
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Cadence/Synopsys design flow (PDK ST 45nm, ST 28 nm)
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Xilinx ISE design flow
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Modelsim/Questasim/Synplify VHDL envinronment
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HSPICE, NGSPICE, SPECTRE circuit simulators
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QEMU, MPARM, SoCLib architecture simulators
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gcc embedded cross toolchains
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Microchip MPLAB
Available PhD research topics can be summarized as the design and modeling of power-aware and variation-aware microprocessor architectures and circuits for IoT.
Visit the LSD lab at http://vlsi.diet.uniroma1.it.
For further information on how to join, please contact the researchers at LSD lab: