MARCO PISANI

PhD Student

PhD program:: XL
email: marco.pisani@uniroma1.it
building: RM032 - S. Pietro in Vincoli - Edificio B – Via Eudossiana, 18
room: 422 - Laboratorio Sistemi Digitali

supervisor: Mauro Olivieri

Research Topic: Parallel Computing and Digital Radar Systems Design

Curriculum: Electronics Engineering

Ph.D. start date: Novembre 2024

Ph.D. Advisory Board: Giuseppe Scotti, Francesco Menichelli, Pietro Monsurrò

Research products

11573/1762478 - 2026 - A General-Purpose AXI Plug-and-Play Hyperdimensional Computing Accelerator

Martino, Rocco; Pisani, Marco; Angioli, Marco; Barbirotta, Marcello; Mastrandrea, Antonio; Rosato, Antonello; Olivieri, Mauro - 01a Articolo in rivista

paper: ELECTRONICS (Basel : MDPI) pp. - - issn: 2079-9292 - wos: WOS:001670349800001 (0) - scopus: 2-s2.0-105028656069 (0)

11573/1765622 - 2025 - Fault tolerant voting circuits. A dual-modular-redundancy approach for single-event-transient mitigation

Barbirotta, Marcello; Angioli, Marco; Mastrandrea, Antonio; Menichelli, Francesco; Pisani, Marco; Olivieri, Mauro - 04c Atto di convegno in rivista

paper: MICROPROCESSORS AND MICROSYSTEMS (Butterworth Heinemann Publishers:Linacre House Jordan Hill, Oxford OX2 8DP United Kingdom:011 44 1865 314569, EMAIL: bhmarketing@repp.co.uk, INTERNET: http://www.laxtonsprices.co.uk, Fax: 011 44 1865 314569) pp. - - issn: 0141-9331 - wos: WOS:001602776900001 (0) - scopus: 2-s2.0-105018850541 (0)

conference: 2024 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) (Didcot; UK)