ABDALLAH CHEIKH

PhD Graduate

PhD program:: XXXII


advisor: prof. Mauro Olivieri

Thesis title: Energy Efficient Digital Electronic Systems Design for Edge-Computing Application, through Innovative RISC-V Compliant Processors.


Research products

11573/1682695 - 2023 - Contextual bandits algorithms for reconfigurable hardware accelerators
Angioli, Marco; Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Jamili, Saeid; Olivieri, Mauro - 04b Atto di convegno in volume
conference: Applications in Electronics Pervading Industry, Environment and Society (Genoa; Italy)
book: Lecture notes in electrical engineering - (978-3-031-30333-3)

11573/1692822 - 2023 - Fault-tolerant hardware acceleration for high-performance edge-computing nodes
Barbirotta, M.; Cheikh, A.; Mastrandrea, A.; Menichelli, F.; Angioli, M.; Jamili, S.; Olivieri, M. - 01a Articolo in rivista
paper: ELECTRONICS (Basel : MDPI) pp. 1-15 - issn: 2079-9292 - wos: WOS:001061043700001 (0) - scopus: 2-s2.0-85170563355 (2)

11573/1685071 - 2023 - Improving SET fault resilience by exploiting buffered DMR microarchitecture
Barbirotta, Marcello; Mastrandrea, Antonio; Cheikh, Abdallah; Menichelli, Francesco; Olivieri, Mauro - 02a Capitolo o Articolo
book: SIE 2022. Proceedings of SIE 2022 - (978-3-031-26065-0; 978-3-031-26066-7)

11573/1692824 - 2023 - Homogeneous Tightly-Coupled Dual Core Lock-Step with No Checkpointing Redundancy
Barbirotta, Marcello; Menichelli, Francesco; Mastrandrea, Antonio; Cheikh, Abdallah; Jamili, Saeid; Angioli, Marco; Olivieri, Mauro - 04b Atto di convegno in volume
conference: 54th Annual Meeting of the Italian Electronics Society (Noto (SR), Italy)
book: SIE 2023: Proceedings of SIE 2023 - (978-3-031-48710-1; 978-3-031-48711-8)

11573/1682722 - 2023 - Implementation of dynamic acceleration unit exchange on a RISC-V soft-processor
Jamili, Saeid; Cheikh, Abdallah; Mastrandrea, Antonio; Barbirotta, Marcello; Menichelli, Francesco; Angioli, Marco; Olivieri, Mauro - 04b Atto di convegno in volume
conference: Applications in Electronics Pervading Industry, Environment and Society (Genoa; Italy)
book: Lecture Notes in Electrical Engineering - (978-3-031-30333-3)

11573/1669450 - 2022 - Analysis of a Fault Tolerant Edge-Computing Microarchitecture Exploiting Vector Acceleration
Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Olivieri, Mauro - 04b Atto di convegno in volume
conference: 2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) (Villasimius, SU, Italy)
book: PRIME 2022 - 17th International Conference on Ph.D Research in Microelectronics and Electronics, Proceedings - (978-1-6654-6700-1)

11573/1669461 - 2022 - Design and evaluation of buffered triple modular redundancy in interleaved-multi-threading processors
Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Olivieri, Mauro - 01a Articolo in rivista
paper: IEEE ACCESS (Piscataway NJ: Institute of Electrical and Electronics Engineers) pp. 126074-126088 - issn: 2169-3536 - wos: WOS:000896597600001 (3) - scopus: 2-s2.0-85144067405 (4)

11573/1669457 - 2022 - Evaluation of Dynamic Triple Modular Redundancy in an Interleaved-Multi-Threading RISC-V Core
Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Ottavi, Marco; Olivieri, Mauro - 01a Articolo in rivista
paper: JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS (Basel : MDPI) pp. 1-13 - issn: 2079-9268 - wos: WOS:000955847900001 (4) - scopus: 2-s2.0-85150985066 (9)

11573/1622494 - 2021 - A Fault Tolerant soft-core obtained from an Interleaved-Multi- Threading RISC- V microprocessor design
Barbirotta, Marcello; Cheikh, Abdallah; Mastrandrea, Antonio; Menichelli, Francesco; Vigli, Francesco; Olivieri, Mauro - 04b Atto di convegno in volume
conference: 34rd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021 (Online; Greece)
book: 34rd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2021 - (978-1-6654-1609-2)

11573/1540122 - 2021 - Klessydra-T: Designing vector coprocessors for multithreaded edge-computing cores
Cheikh, A.; Sordillo, S.; Mastrandrea, A.; Menichelli, F.; Scotti, G.; Olivieri, M. - 01a Articolo in rivista
paper: IEEE MICRO (IEEE / Institute of Electrical and Electronics Engineers Incorporated:445 Hoes Lane:Piscataway, NJ 08854:(800)701-4333, (732)981-0060, EMAIL: subscription-service@ieee.org, INTERNET: http://www.ieee.org, Fax: (732)981-9667) pp. 64-71 - issn: 0272-1732 - wos: WOS:000639559200011 (14) - scopus: 2-s2.0-85099594718 (19)

11573/1540108 - 2021 - Customizable vector acceleration in extreme-edge computing. A risc-v software/hardware architecture study on VGG-16 implementation
Sordillo, S.; Cheikh, A.; Mastrandrea, A.; Menichelli, F.; Olivieri, M. - 01a Articolo in rivista
paper: ELECTRONICS (Basel : MDPI) pp. 1-21 - issn: 2079-9292 - wos: WOS:000623372400001 (2) - scopus: 2-s2.0-85101277706 (5)

11573/1540143 - 2020 - Fault resilience analysis of a RISC-V microprocessor design through a dedicated UVM environment
Barbirotta, M.; Mastrandrea, A.; Menichelli, F.; Vigli, F.; Blasi, L.; Cheikh, A.; Sordillo, S.; Di Gennaro, F.; Olivieri, M. - 04b Atto di convegno in volume
conference: 33rd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020 (Online; Italy)
book: 33rd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2020 - (978-1-7281-9457-8)

11573/1465123 - 2020 - A RISC-V fault-tolerant microcontroller core architecture based on a hardware thread full/partial protection and a thread-controlled Watch-dog timer
Blasi, L.; Vigli, F.; Cheikh, A.; Mastrandrea, A.; Menichelli, F.; Olivieri, M. - 04b Atto di convegno in volume
conference: International Conference on Applications in Electronics Pervading Industry, Environment and Society, ApplePies 2019 (Pisa, Italia)
book: Lecture Notes in Electrical Engineering - ()

11573/1465125 - 2020 - Efficient Mathematical Accelerator Design Coupled with an Interleaved Multi-threading RISC-V Microprocessor
Cheikh, A.; Sordillo, S.; Mastrandrea, A.; Menichelli, F.; Olivieri, M. - 04b Atto di convegno in volume
conference: International Conference on Applications in Electronics Pervading Industry, Environment and Society, ApplePies 2019 (Pisa, Italia)
book: ApplePies 2019: Applications in Electronics Pervading Industry, Environment and Society - (9783030372767)

11573/1292125 - 2019 - The microarchitecture of a multi-threaded RISC-V compliant processing core family for IoT end-nodes
Cheikh, A.; Cerutti, G.; Mastrandrea, A.; Menichelli, F.; Olivieri, M. - 04b Atto di convegno in volume
conference: International Conference on Applications in Electronics Pervading Industry, Environment and Society, APPLEPIES 2017 (Roma)
book: Lecture Notes in Electrical Engineering - (978-3-319-93081-7; 978-3-319-93082-4)

11573/1047455 - 2017 - Investigation on the optimal pipeline organization in RISC-V multi-threaded soft processor cores
Olivieri, Mauro; Cheikh, Abdallah; Cerutti, Gianmarco; Mastrandrea, Antonio; Menichelli, Francesco - 04b Atto di convegno in volume
conference: 1st New Generation of CAS, NGCAS 2017 (Genova, ITALY)
book: Proceedings - 2017 1st New Generation of CAS, NGCAS 2017 - (9781509064472)

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